From bf7ac369d0f1743dddb6a177a2ceb3a3be155779 Mon Sep 17 00:00:00 2001 From: Kyle Carbone Date: Sat, 24 Oct 2026 09:20:49 -0400 Subject: [PATCH] espressif/qspibus: mark bus pins never-reset QSPIBus claimed its pins but never marked them never-reset, so reset_all_pins() in cleanup_after_vm() (run after the boot.py phase and after code.py) detached clock, data0-3 and cs from the SPI peripheral and marked them free while the display bus stayed alive. On the Waveshare ESP32-S3-Touch-AMOLED-2.41, board.DISPLAY stayed black: the QSPI pins reported free and the panel's TE line never pulsed. Mark clock, data0-3, cs and the optional dcx and reset pins never-reset right after claiming them, as paralleldisplaybus and fourwire already do. deinit() needs no change: it releases the pins with reset_pin_number(), which also clears the never-reset bit. Co-Authored-By: Claude Opus 5.5 --- ports/espressif/common-hal/qspibus/QSPIBus.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/ports/espressif/common-hal/qspibus/QSPIBus.c b/ports/espressif/common-hal/qspibus/QSPIBus.c index 6fb872248e2..02a2289c9c4 100644 --- a/ports/espressif/common-hal/qspibus/QSPIBus.c +++ b/ports/espressif/common-hal/qspibus/QSPIBus.c @@ -331,20 +331,31 @@ void common_hal_qspibus_qspibus_construct( mp_raise_OSError_msg_varg(MP_ERROR_TEXT("%q failure: %d"), MP_QSTR_QSPI, (int)err); } + // Mark the bus pins never-reset so they stay attached to the SPI peripheral + // across reset_all_pins() at VM end; the display (e.g. board.DISPLAY) outlives + // the VM. deinit() clears this again via reset_pin_number(). claim_pin(clock); + common_hal_never_reset_pin(clock); claim_pin(data0); + common_hal_never_reset_pin(data0); claim_pin(data1); + common_hal_never_reset_pin(data1); claim_pin(data2); + common_hal_never_reset_pin(data2); claim_pin(data3); + common_hal_never_reset_pin(data3); claim_pin(cs); + common_hal_never_reset_pin(cs); if (dcx != NULL) { claim_pin(dcx); + common_hal_never_reset_pin(dcx); gpio_set_direction((gpio_num_t)self->dcx_pin, GPIO_MODE_OUTPUT); gpio_set_level((gpio_num_t)self->dcx_pin, 1); } if (reset != NULL) { claim_pin(reset); + common_hal_never_reset_pin(reset); gpio_set_direction((gpio_num_t)self->reset_pin, GPIO_MODE_OUTPUT); gpio_set_level((gpio_num_t)self->reset_pin, 0);