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[libcpu][riscv] fix MMU and user fault handling for Smart - #11892

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[libcpu][riscv] fix MMU and user fault handling for Smart#11892
BernardXiong wants to merge 2 commits into
RT-Thread:masterfrom
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@BernardXiong

@BernardXiong BernardXiong commented Oct 18, 2026 •
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拉取/合并请求描述：(PR description)

为什么提交这份PR (why to submit this PR)

Several RISC-V Smart issues prevented reliable user space operation: early page table pointers were not translated with the kernel physical offset, per-hart page tables inherited user mappings, early page tables were not flushed, and unhandled user faults could terminate the kernel instead of the current process.

你的解决方案是什么 (what is your solution)

  • add XuanTie architecture selection and the SVPBMT option
  • translate early page table pointers with the kernel physical offset
  • allow the MPR range to extend below the linked kernel base
  • clean early page tables before enabling the MMU
  • clear user address entries in per-hart kernel page tables
  • terminate only the current LWP on unhandled user faults
  • keep interrupts enabled while reporting user context

请提供验证的bsp和config (provide the config and bsp)

  • BSP: bsp/qemu-virt64-riscv, bsp/k230
  • .config: CONFIG_RT_USING_SMART=y, CONFIG_ARCH_RISCV64=y
  • action: local build not run; the RISC-V musleabi toolchain is not available in this environment, CI will verify the build

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

  • 本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
  • 本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality：

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

  • 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
  • 代码风格正确，包括缩进空格，命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
  • 没有垃圾代码，代码尽量精简，不包含#if 0代码，不包含已经被注释了的代码 All redundant code is removed and cleaned up
  • 所有变更均有原因及合理的，并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
  • 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
  • 代码是高质量的 Code in this PR is of high quality
  • 已经使用clang-format 源码格式化工具确保格式符合RT-Thread代码规范 This PR has been formatted with clang-format and complies with RT-Thread code specification
  • 如果是新增bsp, 已经添加ci检查到.github/ALL_BSP_COMPILE.json 详细请参考链接BSP自查

@BernardXiong
[libcpu][riscv] fix MMU and user fault handling for Smart
efacd97 
- add XuanTie architecture selection and the SVPBMT option
- translate early page table pointers with the kernel physical offset
- allow the MPR range to extend below the linked kernel base
- clean early page tables and clear user entries for each hart
- terminate only the current LWP on unhandled user faults
- keep interrupts enabled while reporting user context
@BernardXiong BernardXiong mentioned this pull request Oct 18, 2026
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github-actions Bot commented Oct 18, 2026

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👋 感谢您对 RT-Thread 的贡献！Thank you for your contribution to RT-Thread!

为确保代码符合 RT-Thread 的编码规范，请在你的仓库中执行以下步骤运行代码格式化工作流（如果格式化CI运行失败）。
To ensure your code complies with RT-Thread's coding style, please run the code formatting workflow by following the steps below (If the formatting of CI fails to run).

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  • Use workflow from 保持默认分支（通常为 master）
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  • 在 branch 输入框填写 PR 分支 pr/riscv-smart-mmu
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Once completed, commits will be pushed to the pr/riscv-smart-mmu branch automatically, and the related Pull Request will be updated.

如有问题欢迎联系我们，再次感谢您的贡献！💐
If you have any questions, feel free to reach out. Thanks again for your contribution!

@BernardXiong
BernardXiong marked this pull request as ready for review October 18, 2026 12:07
@github-actions github-actions Bot added Arch: RISC-V BSP related with risc-v libcpu labels Oct 18, 2026
@github-actions

github-actions Bot commented Oct 18, 2026 •
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📌 Code Review Assignment

🏷️ Tag: libcpu_riscv

Reviewers: @Yaochenger

Changed Files (Click to expand)
  • libcpu/risc-v/common/mmu.c
  • libcpu/risc-v/common/trap.c
  • libcpu/risc-v/common64/mmu.c

📊 Current Review Status (Last Updated: 2026-10-18 21:59 CST)

📝 Review Instructions

  1. 维护者可以通过单击此处来刷新审查状态: 🔄 刷新状态
    Maintainers can refresh the review status by clicking here: 🔄 Refresh Status

  2. 确认审核通过后评论 LGTM/lgtm
    Comment LGTM/lgtm after confirming approval

  3. PR合并前需至少一位维护者确认
    PR must be confirmed by at least one maintainer before merging

ℹ️ 刷新CI状态操作需要具备仓库写入权限。
ℹ️ Refresh CI status operation requires repository Write permission.

@BernardXiong
[libcpu][riscv] declare rt_hw_show_register before use
88463e2 
- add a forward declaration for the user fault register dump
- fix the implicit declaration error on RISC-V builds
cms19859230182-lang
cms19859230182-lang reviewed Oct 18, 2026
View reviewed changes
Comment thread libcpu/risc-v/common64/mmu.c
Comment on lines +1146 to +1150
int start_idx = USER_VADDR_START >> VPN2_SHIFT;
int end_idx = USER_VADDR_TOP >> VPN2_SHIFT;
for (i = start_idx; i <= end_idx; i++)
{
mmu_table[i] = 0;

@cms19859230182-lang cms19859230182-lang Oct 18, 2026

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熊老师好呀！这段清零好像只在非 SMP 分支，SMP 下每个 hart 的 table 是不是也要清一下？另外 common 用的是 USER_VADDR_TOP - 1，这里是 TOP，不知道是不是有意的？如有误解请指正，谢谢！

cms19859230182-lang
cms19859230182-lang reviewed Oct 18, 2026
View reviewed changes
Comment thread libcpu/risc-v/common/trap.c
Comment on lines 73 to +74
sys_exit_group(-1);
csr_write(CSR_STATUS, saved_stat);

@cms19859230182-lang cms19859230182-lang Oct 18, 2026

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熊老师好呀！sys_exit_group(-1) 后面的 csr_write 按理走不到，IE 会一直开着。是不是先恢复再调更稳？如有误解请指正，谢谢！

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github-actions Bot commented Oct 18, 2026

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MemBrowse Memory Report

k230

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@BernardXiong @cms19859230182-lang